1. Field of the Invention
The invention relates to arrangements for inhibiting adhesion of the lid to the substrate (or interposer) in lidded semiconductor packages, and to methods for fabricating semiconductor packages having such arrangements.
2. Related Art
Conventional semiconductor flip-chip package arrangements include ball grid array (BGA) packages and land grid array (LGA) packages.
In a BGA package, a ceramic or organic substrate (or interposer) is connected to a semiconductor die by a suitable means such as an array of flip-chip solder bumps and an underfill material (for example, polymer). The substrate itself may have an array of solder balls to enable subsequent assembly of the package onto a printed circuit board (PCB). A lid, which may constitute or connect to a heat sink to dispel heat generated by the semiconductor die, may be adhered to the die by a suitable thermally-conductive adhesive.
In an LGA package, metal lands (or pads) on the substrate (interposer) mate and contact interconnects (metal spring or conductive polymer) in a socket.
In conventional BGA and LGA arrangements, the lid is adhered to the substrate by means of connecting elements, which may be made of a thermally conductive polymer. Connecting elements adhere to both lid and substrate by means of the same thermally-conductive polymer adhesive. The polymer used to adhere the die to the lid may be different from the polymer used to adhere the die to the substrate.
Unfortunately, in configurations such as the BGA package, board level reliability (BLR) performance under thermal cycling (TC) may be significantly reduced when the lid adheres to the substrate at the corner locations. This BLR performance reduction occurs because the various package components have different coefficients of thermal expansion (CTEs). With different CTEs, differential expansion and contraction of package components during low temperature-high temperature TC testing cause shearing deformation of the BGA solder balls or joints. These joints are where failures almost always occur. The magnitude of these solder joint shear deformations is maximum at the joints in the corner locations. This situation is exacerbated by the fact that the lid is coupled to the substrate at these corner locations.
Other conventional packages omit connecting elements associated with the BGA packages mentioned above. By not adhering lid to substrate, a significant improvement in BLR TC performance may be achieved—as much as 25–40%, based on finite element modeling and experimental testing. However, this arrangement has a problem in that, because the lid does not adhere to the substrate, the lid could be tilted after being placed atop die. A tilted lid is detrimental to mechanical reliability of the package, because during package electrical testing in a test socket, a plate/actuator applies force that causes pressure to be applied in a non uniform manner to the substrate, causing the substrate to crack. Such cracking is especially troublesome for low-temperature co-fired ceramic (LTCC) substrates, which have less flexural strength than high-temperature co-fired ceramic (HTCC) ceramics such as alumina.
A similar failure mode in both BGA and LGA packages, that of substrate cracking, is likely to occur also in high power semiconductor packages in which a heat sink is affixed to the PCB. In particular, compressive forces during affixing might crack the substrate. For example, in BGA arrangements, because force is transferred only through the die surface area, the force compresses the solder joints under the die, resulting in early shorted ball failure under use conditions when the solder exhibits creeping behavior under compression.
A tilted lid also affects thermal performance of packages. Heat dissipation ability of a flip-chip package depends on the thermal resistance between the lid and die, which is minimized by reducing the thickness of the bond line (the adhesive between semiconductor die and lid). A tilted lid causes non-uniform bond line thickness, which in turn may cause locally high thermal resistance for part of the die and degrade thermal performance of the package.